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LTM8026
APPLICATIONS INFORMATION
may be set from 100kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through
the SYNC pin. The external clock applied to the SYNC pin
must have a logic low below 0.6V and a logic high greater
than 1.2V. The input frequency must be 20% higher than
the frequency determined by the resistor at the RT pin.
In general, the duty cycle of the input signal should be
greater than 10% and less than 90%. Input signals outside
of these specified parameters may cause erratic switching
behavior and subharmonic oscillations. The SYNC pin must
be tied to GND if the synchronization to an external clock
is not required. When SYNC is grounded, the switching
frequency is determined by the resistor at the RT pin. At
light loads, the LTM8026 will enter discontinuous opera-
tion to improve efficiency even while a valid clock signal
is applied to the SYNC pin.
Soft-Start
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltage ramp minimizes output voltage overshoot, reduces
inrush current from the V IN supply, and facilitates supply
sequencing. A capacitor connected from the SS pin to
GND programs the slew rate. The capacitor is charged
from an internal 11μA current source to produce a ramped
output voltage.
Load Current Derating Using the CTL_T Pin
In high current applications, derating the maximum current
based on operating temperature may prevent damage
to the load. In addition, many applications have thermal
limitations that will require the regulated current to be
reduced based on the load and/or board temperature. To
achieve this, the LTM8026 uses the CTL_T pin to reduce
the effective regulated current in the load. While CTL_I
programs the regulated current in the load, CTL_T can
be configured to reduce this regulated current based
on the analog voltage at the CTL_T pin. The load/board
temperature derating is programmed using a resistor
divider with a temperature dependant resistance (Figure?2).
When the board/load temperature rises, the CTL_T voltage
will decrease. To reduce the regulated current, the CTL_T
voltage must be lower than the voltage at the CTL_I pin.
CTL_T may be higher than CTL_I, but then it will have
no effect.
Voltage Regulation and Output Overvoltage Protection
The LTM8026 uses the ADJ pin to regulate the output
voltage and to provide a high speed overvoltage lockout
to avoid high voltage conditions. If the output voltage
exceeds 125% of the regulated voltage level (1.5V at the
ADJ pin), the LTM8026 terminates switching and shuts
Maximum Output Current Adjust
V REF
2V
I MAX
Amps
7.467 ? R2
R1 + R2
Toadjusttheregulatedloadcurrent,ananalogvoltageis
applied to the CTL_I pin or CTL_T pins. Varying the voltage
between 0V and 1.5V adjusts the maximum current between
the minimum and the maximum current, 5.6A typical.
Graphs of the output current vs CTL_I and CTL_T volt-
ages are given in the Typical Performance Characteristics
section. The LTM8026 provides a 2V reference voltage for
conveniently applying resistive dividers to set the current
limit. The current limit can be set as shown in Figure 1
with the following equation:
=
LTM8026 R1
CTL_I OR CTL_T
R2
8026 F01
Figure 1. Setting the Output Current Limit, I MAX
R V
V REF
R2 LTM8026 R NTC R NTC R X R NTC R NTC
CTL_T
R1 A B C
(OPTION A TO D)
D
R V
R X
8026 F02
Figure 2. Load Current Derating vs Temperature Using NTC
Resistor
8026fb
For more information www.linear.com/LTM8026
15
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